ILAng
  • Introduction
  • Getting Started
    • Installing ILAng
    • ILAng with CMake
    • ILAng with Python
    • ILAng in Docker
  • Modeling
    • ILA Model
    • Architectural States
      • Expressions
      • Uninterpreted function
    • Instructions
    • Hierarchical ILA
    • Conclusion
  • Synthesis
    • Writing Templates
    • Interfacing Simulators
    • Synthesis Results
    • Conclusion
  • Verification
    • Refinement Relation
    • Verification Target
    • Examples
    • Notes
  • Development
    • Release Notes
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  • Why ILA/ng
  • Applications
  • Other sources
  • Related publications

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Introduction

NextGetting Started

Last updated 4 years ago

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Why ILA/ng

ILAng is a modeling and verification platform for systems-on-chips (SoCs) where Instruction-Level Abstraction (ILA) is used as the formal model for hardware components. The ILA formal model targeting the hardware-software interface enables a clean separation of concerns between software and hardware through a unified model for heterogeneous processors and accelerators. ILAng provides a programming interface for

  1. constructing ILA models,

  2. synthesizing ILA models from templates using program synthesis techniques,

  3. verifying properties on ILA models, and

  4. behavioral equivalence checking between different ILA models, and between an ILA specification and an implementation.

ILAng also provides for translating models and properties into various languages (e.g., Verilog and SMT LIB2) for different verification settings and use of third-party verification tools.

Applications

The ILAng platform has been used in several applications:

Other sources

Related publications

Below are the ILA-related publications (bib-entries available below)

Behavioral Equivalence Checking. The modularity and hierarchy in the ILA models simplify behavioral equivalence checking through decomposition. [] ()

Firmware/Hardware Co-Verification. The ILA models program-visible hardware behavior while abstracting out lower-level implementation details. This enables scalable firmware/hardware co-verification. [, ]

Memory Consistency and Concurrency Reasoning. The ILA model is an operational model that captures program-visible state updates. When integrated with axiomatic memory consistency models that specify orderings between memory operations, the transition relation can be used to reason about concurrent interactions between heterogeneous components. []

Data Race Checking of GPU Programs. Besides general-purpose processors and accelerators, an ILA model can be synthesized for the Nvidia GPU PTX instruction set using the synthesis engine. This can then been used for data race checking for GPU programs. []

Synthesizing Environment Invariants for Modular Hardware Verification. With ILAs, we automate synthesis of environment invariants for modular hardware verification in processors and application-specific accelerators, where functional equivalence is proved between a high-level specification and a low-level implementation. []

: The goal of Upscale project is to develop tools and techniques for verifying and evaluating open-source hardware, with the ILA-based methodology at its core.

: The public GitHub repo for ILAng platform implementation.

: A web-versioned documentation of the ILAng code annotation.

: An ILA model data base containing examples, archived ILA models, ILA applications, etc.

: A template-driven ILA synthesis engine using program synthesis techniques.

Synthesizing Environment Invariants for Modular Hardware Verification. []

ILAng: A Modeling and Verification Platform for SoCs using Instruction-Level Abstractions. []

A Formal Instruction-Level GPU Model for Scalable Verification. []

Integrating Memory Consistency Models with Instruction-Level Abstractions for Heterogeneous System-on-Chip Verification. []

Formal Security Verification of Concurrent Firmware in SoCs using Instruction-Level Abstraction for Hardware. []

Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification. [] ()

Template-based Parameterized Synthesis of Uniform Instruction-Level Abstractions for SoC Verification. []

Invited: Specification and Modeling for Systems-on-Chip Security Verification. []

Verifying Information Flow Properties of Firmware using Symbolic Execution. []

Template-based Synthesis of Instruction-Level Abstractions for SoC Verification. []

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ICCAD18
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GitHub
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referencesila.tex
Bibliography entries
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